VisualApplets® 1.2

VisualApplets® is a graphic-oriented tool, which dramatically simplifies the programming of image processing on FPGA hardware.

VisualApplets® is a hardware programming tool for FPGAs, based on the use of graphical pipeline-structuree objects. Image processing designs are arranged by the combination of operator modules, filter modules and transport links. The provided libraries contain more than 200 hardware based operators which cover standard as well as advanced image processing functions.

Included in delivery are e.g. arithmetical and morphological operators for pixel manipulation, logical operators for classification tasks, complex modules for colour processing, operators for statistics analysis and processing of image sequences. Additional operators are responsible for format conversion, compression or conversion in pixel lists. Future features are geometrical transformation and segmentation amongst others.

The complete set of functions is implemented as hardware operators and guarantees a image processing in real-time. The complexity of the image processing designs is mainly limited by the available resources of the FPGA hardware.

There is no configuration necessary for synchronization, timing or avoiding problems with side-effects. Both a synthesis and a high level simulation are integrated and offer full control over the final visual result of a design at any time.

The complete process of the hardware design creation lasts 10-15 minutes on an average. The hardware applet can immediately be used with the viewer and configuration software microDisplay or be integrated in applications by use of the SDK.

Although knowledge of hardware programming is advantageous, the software solution VisualApplets® is addressed to application engineers in Machine Vision as a matter of priority. In first approximation VisualApplets® is hardware-independent. VisualApplets® runs under Windows 2000 and XP.

Generally VisualApplets® was developed as a hardware independent programming tool.

Besides the future extension of the image processing libraries, VisualApplets® is under development to support third party hardware platform e.g. intelligent cameras.

Feature list of VisualApplets®
(Selection)

• Graphical interface to program FPGA hardware
  
• Abstract work flow with image operators
  
• Modules can be parameterized, e.g. in the function, behaviour or data format
  
• Integrated help function for operators and for operator search
  
• Libraries with hardware modules as representing frame grabber platform
  
• Image processing libraries with various filter operators and imaging modules
  
• Availability of Visual Applets image processing libraries with special market-, branch- or customer focus
  
• Support of VHDL import by EDIF cores (guided service at the moment)
  
• Adding of user specific libraries
  
• New file format enables use of protected libraries
  
• Use of a precompiled file format
  
• Integration of a synthesis and a high level simulation in software
  
• Simulation shows the progressing result at any point of the processing
  
• User keeps control over the final visual result of his application at any time
  
• User has overview of processing resources, load of resources and expected data bandwidth
  
• No knowledge required in circuitry, synchronization, timings and FPGA programming
  
• No examination of side-effects
  
• No need for a VHDL compiler
  
• Addressed from a hardware developer to an application engineer
  
• Closes the gap between standard and custom specific applets
  
• Complete process of the hardware design creation lasts 10-15 minutes on an average
  
• VisualApplets® applets are immediately usable in SDK and microDisplay
  
• VisualApplets® supports microEnable III, microEnable IV and future product lines
  
• VisualApplets® supports third party hardware, e.g. intelligent cameras
  
• VisualApplets® can be used as programming interface for OEM products
  
• VisualApplets® supports Windows 2000 and XP
  

Visual Applets® is delivered with typical libraries to solve requirements of applications in Machine Vision. The libraries are divided in modules and filter operators, which can be combined and parameterised. Version 1.x contains base libraries with arithmetical, morphological and logical operators, special libraries with colour modules, statistical information and image enhancements and hardware dependent modules.

The current version of Visual Applets® has included about 200 operators in total. The functionality will be extended by additional libraries and opened for third party operators.

Available VisualApplets® Modules and Filter Operators

• Hardware dependent operators
  
• Operators for pixel manipulation
  
• Arithmetic operators
  
• Logic operators
  
• Image comparison filter and morphological operators
  
• Colour processing operators
• Signal processing operators
• Statistical processing operators
• Synchronisation operators
  
• Various operators for image manipulation
  

VisualApplets® Modules and Filter Operators Features

• Programmable modular trigger system
  
• Optimized trigger and encoder functionality
  
• Trigger to image synchronization
  
• General purpose IO system
  
  
• Shading corrections (1D and 2D)
  
• Spatial corrections
  
• Advanced Bayer filter and colour operators
  
• Object separation
  
• Statistical operators
  
• Rank operator
  
• Compression functionality, RLE and pixel list
  
• Multi ROI and dynamic ROI
  
• Histograms
  
• Knee look-up table
  
• 12bit processing
  
• Coefficient buffer
  
• Image sequences
  
• Laser triangulation
  

Future VisualApplets® features

• Scripting
  
• Subroutine for functional extensions
  
• Support of virtual DMA
  
• Fixed point arithmetic
  
• Additional arithmetic
  
• Additional format conversions
  
• New pixel manipulations
  
• Compression functionality, JPEG and M-JPEG
  
• Geometrical transformation
  
• Sequence processing
  
• Segmentation
  

VisualApplets® is a graphically oriented tool, which simplifies the programming of image pre-processing on FPGAs.

VisualApplets® is a tool for hardware programming on FPGAs, based on graphical data pipelines. These data pipelines are arranged by the combination of operators and filter modules of image processing libraries and are compiled to a loadable hardware applet.

The libraries contain e.g. arithmetical and morphological operators for pixel manipulation, logical operators for classification tasks and also complex modules for colour processing and compression.

There is no configuration necessary for synchronization, timing or avoiding problems with side-effects. Both a synthesis and a high level simulation are integrated and offer full control over the final visual result of the application at any time.

The complete process of the hardware design creation lasts 10-15 minutes on an average. The hardware applet can immediately be used with the configuration software microDisplay or integrated in applications by use of the SDK.

Although knowledge of hardware programming is advantageous, the software solution VisualApplets® is addressed to software programmers in Machine Vision as a matter of priority. In first approximation VisualApplets® is hardware-independent. At present microEnable III product line of SILICONSOFTWARE is the supported hardware platform. VisualApplets® runs under Windows 2000 and XP.

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The hardware programming in VisualApplets® is the combination and parameterization of hardware-level modules and algorithmic elements in a data pipeline structure. The interfaces to the frame grabber work hardware-dependently, however the pre-processing on the FPGA hardware-independently.

A base library supports the processing of pixel fields by extraction functions. Split, sampling and synchronization functions complete the content of the library. The library of the arithmetic operators supports the pixel manipulation. The Filter Factory offers different kinds of the pixel field manipulation, e.g. determining minima, maxima, median and morphological operators. The libraries with more complex functions are colour processing and colour interpolation, another contains modules for Lookup and Knee-Lookup tables, threshold, binarisation and counter functions. For the use of classification tasks logical operators are integrated. Boolsche operators are implemented as well as selector operators.

The data pipeline scheme is converted to function-related blocks for a preparation to FPGA layout. This operation is processed without any additional entries of the user. There is no configuration necessary for synchronization, timing or problems with side-effects. The rule check is performed automatically.

A VHDL compiler isn't needed as well. The user controls the complexity of the pre-processing related to the expected result by the display of processing resources, load of resources and expected data bandwidth. The Place & Route process converts the hardware design into a FPGA layout. An additional tool of the FPGA manufacturer is needed here. Once installed, the software is automatically integrated, configured and executed.

After this process, a so-called hardware applet is automatically created, which can be loaded in microDisplay or used in application awith SDK functionality.

• Graphically oriented programming tool for FPGA hardware
  
• Abstractly working with image operators
  
• Libraries with hardware modules as representing frame grabber platform
  
• Image processing libraries with various filter operators and imaging modules
  
• Closes the gap between standard and custom specific applets
  
• Integration of a synthesis and a high level simulation in software
  
• Addressed from a hardware developer to a software programmer
  
• No knowledge required in circuitry, synchronization, timings and FPGA programming
  
• No examination of side-effects
  
• No need for a VHDL compiler
  
  
• Modules can be parameterized, e.g. in the function, behaviour or data format
  
• User keeps control over the final visual result of his application at any time
  
• Simulation shows the progressing result at any point of the processing
  
• User has overview of processing resources, load of resources and expected data bandwidth
  
  
• Complete process of the hardware design creation lasts 10-15 minutes on an average
  
• VisualApplets® applets are immediately usable in SDK and microDisplay
  
• VisualApplets® supports microEnable III and future product lines
  
• VisualApplets® can be used as programming interface for OEM products
  
• VisualApplets® supports Windows 2000 and XP
  
• Future availability of VisualApplets® image processing libraries with special market-, branch- or customer focus
  

Visual Applets® is delivered with typical libraries to solve applications in Machine Vision. The libraries are divided in modules and filter operators, which can be combined and parameterised. Visual Applets® contains base libraries like arithmetical, morphological and logical operators, special libraries with colour modules, statistical information and image enhancements and hardware dependent modules. The functionality will be extended by additional libraries upcomingly.

Hardware dependent operators for microEnable III / -XXL

• Camera interfaces: BASE and MEDIUM in combination with
  
• Acquisition modules: Area and Line operation modules, Grayscale, RGB and Bayer color mode modules
  
• Image memory interfaces: Image buffer, image FIFO
  
• Digital interfaces: DigIOPort module
  
• Trigger interfaces: AreaPort and LinePort modules
  
• Transfer interfaces: DMA read and DMA write module
  
  

Operators for pixel manipulation

• Processing modules: Increase and decrease of parallelity
  
• Extraction modules: Parallelity, components, pixel field, bitfield, image
  
• Module relations: Synchronicity, splitting
  
• Resolution: increase and decrease of sample rate
  
• Color mode converter: GRAY2RGB and GRAY2HSI modules
  
• Image operator: Remove image
  
• Definition operator: Constant value
  
  

Arithmetic operators

• Type conversion operator: Type cast, bit cast
  
• Value conversion operator: Bitrange
  
• Mathematical operators 1: Addition, subtraction, multiplication, division, scaling, shifting, randomising, absolute value, sum
  
• Mahematical operators 2: sinus, cosines, tangent, cotangent, arcos functions, square roots
  
  

Logic operators

• Causal operators: IF, CASE, logic NOT, logic AND and logic OR
  
• Boolsche operators 1: comparison between two numbers with: A not equal B, A greater than B, A less than B, A is greater or equal than B, A less or equal than B, A not equal B, A equal B
  
• Boolsche operators 2: comparison between a number and a fixed value with: not equal, is greater than, is less than, is greater or equal than, is less or equal than, is not equal, is equal
  
  

Image comparison filter and morphological operators

• Pixel field operators: creation of pixelfield matrix, process of pixelfiled matrix
  
• Statistical operators: Median, Minimum, Maximum
  
• Morphologial operators: Erode and Dilate
  
  

Various operators for image manipulation

• Lookup table modules: Standard lookup table, knee lookup table
  
• Binary operators: Threshold
  
• Memory operator: Storing of coefficients
  
• Counter operators: Column counter, row counter
  
  

Operators for colour processing

Operators for signal processing

Configuration of the trigger and data interface

Full control of the signal processing

Signal generator

Status displays and info

Configurable delays, polarities and event control

Configuration of shaft encoders

Operators for synchronisation

Synchronisation to frame and line

Various manipulations of images on frame, line and pixel base

Synchronisation of several image flows

Operators for statistical processing

Processing of lines and rows for minimums, maximums and sums

Processing of frames for minimums, maximums and sums

Histograms

Counters

Register and memories on frame and line base