microEnable IV

microEnable IV is a programmable, high performance frame grabber based on the PCI Express interface. It can be connected with CameraLink cameras from one BASE up to 10taps FULL configuration cameras. The boards are equipped with interfaces for PCIe x1 (single lane) up to PCIe x4 (quad lanes). On-board capabilities from 128 MB up to 512 MB DDR-RAM grant a short latency and, in conjunction with the PCI Express interface, a high bandwidth.

The frame grabber system of microEnable IV is extensible in different ways. TTL trigger boards as well as opto-coupled trigger boards with eight inputs and eight outputs are available. By use of CameraLink duplicator CLIO, original image data of the camera can be distributed and processed on up to 256 microEnable IV boards by a daisy chain. Even FULL configuration cameras are supported by the CLIO extension. The PXplant interface is a processor extension to increase the processing capability of the frame grabber.

The FPGA is the vision processor of the frame grabber and "image processing centre" at the same time. High specialized and optimized hardware applets can easily be loaded during the initialization of the board. The applets include necessary functions and features for each operation mode and offer additionally special features for image enhancements without CPU load.

Special adaptations to the requirement of an application can be realized by customized hardware applets. In combination with VisualApplets®, a customer is able to implement image processing algorithms easily into the FPGA of microEnable IV frame grabber. VisualApplets® is a graphic-oriented tool, which simplifies the programming of FPGA hardware.

The PXplant interface enables an upgrading of the processing performance. The PXplant subboards add additional FPGA processor and RAM capabilities.

The extended capability of a secondary FPGA enables complex image pre-processing in hardware. The additional hardware resources can be used in combination with VisualApplets® which allows a user-specific programming of the FPGA processors. microEnable IV is a highly programmable frame grabber series with extended features and perfectly predetermined for a collaboration with VisualApplets®.

Enhanced microEnable features

  • Image processing with 12bit accuracy without loss of performance
  • Large Buffer Support up to 16k widths by 64k heights
  • Sensor Readout Correction with tap sorting of standard as well as non-standard cameras.
  • Knee LUT Support with an internally accuracy of 12bit input and 16bit output. Non-linear pixel modifications can be defined by 256 control points.
  • Shaft Encoder Support with A-B direction recognition and a compression of lines in rewind mode.
  • Serial RGB Output for BASE line cameras and a serial output of colour image data with a bit depth of more than 24bit.
  • Non-linear white Balancing, which can be independently and separately configured for all colour channels
  • Colour Pattern Reconstruction (CFA) in high quality with 7*7 Bayer conversion as well as a linear 3*3 Bayer conversion for two color cameras at the same time.
  • Spatial Offset Correction to compensate the static sensor noise by a subtractive shading correction.
  • Spatial Scaling Correction to compensate the static lightning effect by a multiplicative shading correction.
  • Defect Pixel Interpolation to correct static white and black pixels of a sensor

microEnable IV family

microEnable IV frame grabber product series consist from different types of PCI Express interfaces, support of CameraLink cameras and processing capabilities.

Each frame grabber type owns interfaces to connect additional processing subboards and add-on boards. Available add-on boards cover the CameraLink duplicator board CLIO, a TTL and an opto-coupled trigger system. Processing subboards are available in two types with on-board FPGA, RAM and digital IOs.

The frame grabbers are available as BASE x1, FULL x1 and FULL x4 types.

  • Support of BASE, MEDIUM and FULL configuration CameraLink cameras.
  • Support of Single and Dual operation mode for BASE cameras
  • Support of 10taps FULL configuration cameras
  • Bandwidth between 220 and 1000 Mbytes/sec.
  • Scalable pre-processing capability
  • Additional features by add-on products

microEnable IV - BASE x1

microEnable IV-BASE x1 is a scalable entry solution. It is suited for OEM projects as well as a solution with requirements on customization and flexibility.

  • Support of Dual BASE and MEDIUM CameraLink configuration
  • Support of up to 85 MHz pixel clock
  • Multi-tap sorting
  • Support of greyscale and RGB, area and line cameras in arbitrary combination
  • PCIe x1 interface, bandwidth up to 203 Mbytes/sec.
  • 128 Mbytes on-board
  • Support of VisualApplets® (in conjunction with PixelPlant coprocessor board)
  • PXplant interface, CLIO interface, Trigger/GPIO system connector

microEnable IV - FULL x1

microEnable IV-FULL x1 was developed for application with high input image data rate and need of processing in hardware like 3D laser triangulation or compression tasks.

  • Support of Dual BASE, MEDIUM and FULL CameraLink configuration
  • Support of 10taps FULL cameras
  • Support of up to 85 MHz pixel clock
  • Multi-tap sorting
  • Support of greyscale and RGB, area and line cameras in arbitrary combination
  • PCIe x1 interface, bandwidth up to 208 Mbytes/sec.
  • 256 Mbytes on-board
  • Integrated secondary FPGA processor
  • Support of VisualApplets®
  • PXplant interface, CLIO interface, Trigger/GPIO system connector

microEnable IV - FULL x4

microEnable IV-FULL x4 is a PCIe frame grabber without any compromises. It supports an image data input of up to 10taps FULL configuration and an output of up to 1GB/s. A powerful processing capability and additional extensions define the board as an ultimate vision processor bard for real time applications.

  • Support of Dual BASE, MEDIUM and FULL CameraLink configuration
  • Support of 10taps FULL cameras
  • Support of up to 85 MHz pixel clock
  • Multi-tap sorting
  • Support of greyscale and RGB, area and line cameras in arbitrary combination
  • PCIe x4 interface, bandwidth up to 800 Mbytes/sec.
  • 512 Mbytes on-board
  • Support of VisualApplets®
  • PXplant interface, CLIO interface, Trigger/GPIO system connector

PXplant (Pixel Plant)

PXplant is the processing extension for microEnable IV series and gives the flexibility to meet new requirements to existing solutions.

  • Compatible to microEnable IV-BASE x1, microEnable IV-FULL x1, microEnable IV-FULL x4
  • Additional on-board FPGA and RAM
  • GPIO interface

Co-Processor functionality

The microEnable frame grabber can also be used as co-processor. The co-processor can address any image source like analog, Firewire, USB2 or GigabitEthernet cameras or harddisk stored images. The co-processor can also be used to increase the hardware based computing power of the system.

Advantage of the duplex interface capability of PCI Express is the ability to write and load data over the interface with the same performance. This architecture enables to use the microEnable frame grabber as processor of external image data.

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